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#1 2015-08-15 05:31:53
Fetch And Decode:
Programming Languages Quizzes Computer Architecture Organization
Question:
3 clock cycles are required for register to/from memory transfer. 1 clock cycle is required for Add with both operands in register and 2 clock cycles per word are required for instruction fetch and decode. What are the total number of clock cycles required to execute the program?
Option A):
30
Option B):
35
Option C):
28
Option D):
24
Correct Answer is Option D):
24
Failure is the first step towards seccess.
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2015-08-15 05:31:53
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