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Electrical Engineering Interview Question:
Given the following snipet of Verilog code draw out the waveforms for clk?
Submitted by: AdministratorGiven the following snipet of Verilog code, draw out the waveforms for clk and a
always @(clk) begin
a = 0;
#5 a = 1;
end
<pre>
10 30 50 70 90 110 130
___ ___ ___ ___ ___ ___ ___
clk ___| |___| |___| |___| |___| |___| |___| |___
a ___________________________________________________________
</pre>This obviously is not what we wanted, so to get closer, you could use
"always @ (posedge clk)" instead, and you'd get<pre>
10 30 50 70 90 110 130
___ ___ ___ ___ ___ ___ ___
clk ___| |___| |___| |___| |___| |___| |___| |___
___ ___
a _______________________| |___________________| |_______
</pre>
Submitted by: Administrator
always @(clk) begin
a = 0;
#5 a = 1;
end
<pre>
10 30 50 70 90 110 130
___ ___ ___ ___ ___ ___ ___
clk ___| |___| |___| |___| |___| |___| |___| |___
a ___________________________________________________________
</pre>This obviously is not what we wanted, so to get closer, you could use
"always @ (posedge clk)" instead, and you'd get<pre>
10 30 50 70 90 110 130
___ ___ ___ ___ ___ ___ ___
clk ___| |___| |___| |___| |___| |___| |___| |___
___ ___
a _______________________| |___________________| |_______
</pre>
Submitted by: Administrator
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